High Speed Hardware Architectures 10 GbE PCI Express Board
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description
Description
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- Reference platform for PC based usage of Fraunhofer HHI's 10 GbE TCP / IP stack for communication with lowest latency and highest throughput
- Usage of different copper and optical 10 GbE techno logies by assembly options
- Considerable speed-up of programs using FPGA based co-processors for computationally intensive functions
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applications
Applications
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- High-speed packet filtering (firewall)
- Protocol converter
- iSCSI storage solutions
- Real time data encryption
- Flexible accelerator add-on board
- Base platform for custom developments
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background
Technical Background
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- High-end FPGA (Xilinx Virtex-6 LX240T) with 241152 logic cells
- PCI express interface of 2nd generation with 8 lanes
- Multistandard Ethernet interface options
- 2 x 10 GbE optical connections (SFP+)
- 2 x 10 GBASE-T (RJ45)
- 2 x 10 GBASE-CX-4
- 4 x 1GBASE-LX/SX (SFP)
- 1GBASE-T connection (RJ45) always present
- Up to 4 GB registered ECC DDR3 memory (SO-RDIMM) providing high memory densities and data integrity in combination with high throughput
- High throughput with low latency using QDR2+ SRAM
- Flexible clocking comprising of freely programmable clock generators and additional fixed frequency oscillators
- Functional extensions via standardized connector (ANSI VITA 57.1 - FPGA Mezzanine Card, FMC)
- Input and output of clock signals
- 4 GTX Transceiver (6.5 Gbps)
- Ca. 60 LVDS channels (1 Gbps)
- PC-based configuration enabled by partial reconfiguration over PCIe
- PC independent configuration of the FPGA via a Xilinx platform flash XL
- GPIO interface, LEDs and push-buttons
- JTAG interface for boundary scan (board test) and FPGA configuration
- Dimensions: 220 mm x 107 mm (full size PCIe board)
- High performance DMA based linux device driver available
- Basic DMA based memory driver
- Network driver with offloading options using Fraunhofer HHI's TCP / IP hardware stack possible
- Base driver extendable for custom, application specific drivers
- High speed 1 GbE and 10 GbE TCP / IP-Core as FPGA implementation at call
- Complete stack implemented in hardware
- Enables highest throughput while maintaining lowest latencies
- Customized application implementations in hardware enable further system speed-ups
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Flyer: 10 GbE PCI Express Board