Smart RF (Smart MAT)

Smart RF (Smart MAT)

Co-funded by: Federal Ministry for Economic Affairs and Energy (BMWi)

Duration: June 2007 - December 2010

Transceiver Concepts with Jointly Optimized Analogue and Digital Parts

The competitiveness of wireless industry in Germany can be ensured by products with extended functionality and broadened fields of application as well as with lower production and maintenance costs. This task requires the utilization of innovative ideas and technologies like reconfigurability, adaptivity and multi-functionality of the wireless components. By implementing these concepts, the impairments of the analogue hardware appear to be one of the big challenges. Thus the use of analogue hardware confines the realization of advanced wireless transmission techniques but it is also essential for physically feasible and cost effective solutions. In the project “Smart RF” this problem will be approached by a joint optimization of analogue transceiver hardware and digital signal processing.

Therefore the objective of this project is the development of cost- and power-efficient, broadband transceiver modules, based on jointly optimized analogue and digital parts. This goal shall be reached in a joint project between four members from German wireless industry and two academic partners. The project is funded by the German Federal Ministry of Economics and Technology.

Within the Smart RF project our institute contributes basic research in the areas of high frequency technology, system theory and digital signal processing. Our work covers the mathematical modeling of linear and non-linear analogue transceiver components like broadband IQ-Modulators and power amplifiers as well as the identification of the models by means of RF measurements. Based on this hardware models, optimized transceiver architectures are developed. We also focus on design and investigation of closed loop linearization algorithms especially with respect to IQ errors and nonlinear distortions with memory. Furthermore the real-time implementation of these algorithms in digital signal processing hardware is studied and an experimental transceiver module is set up.