MIRTHE targets new multilevel-modulation all-monolithic integrated TX and RX Photonic Integrated Circuits (PICs) able to achieve 100-400 Gb/s aggregated speed on a single wavelength.

Co-funded by the European Commission's Seventh Framework Programme

This project is motivated by:

The reduction of cost and power consumption of 100 Gb/s transmission equipment

The need of future-proof component technologies for next generation terabit networks.

Chips will be packaged and driven at 28 and then 56 GBauds to realize first PIC-to-PIC Terabit range transmissions. The innovation introduced by the monolithic integration of RX and TX with novel vector EAM-based sources should bring a real breakthrough in cost, size and consumption of Terabit components.


Alcatel Thales III V Lab (ATL), Fraunhofer Institute for Telecommunications Heinrich Hertz Institut (FhG-HHI), U2t Photonics AG (U2T),  Alcatel-Lucent Bell Labs (ALBLF),  VPIphotonics GmbH (VPI),  Grupo de Ingeniería de Comunicaciones. Universidad de Málaga (UMA)

HHI's role

WP2: HHI leads WP2. The scientific and technical activities in this workpackage are focused on the development, fabrication, characterization, and assessment of InP-based monolithic DP-QPSK photoreceivers for 100…200 Gbit/s data rates. Those novel coherent receiver OEICs are key components within small footprint modules. Furthermore novel multiport receivers based on six- and five-port architectures will be developed which will make possible to extend multiport receiver concepts at optical frequencies for the first time.
WP3: HHI provides the module packaging at 56 Gbaud line rate to deliver a 200 Gbit/s capable coherent photoreceiver module