ELAMUR

Electronic Analog Multiplexer for High-Speed Communication Systems

Funded by Deutsche Forschungsgemeinschaft (DFG)
Partnership with Universität Stuttgart

Duration: September 2020 - September 2022

 

The uninterrupted growth in data traffic in the global transmission networks requires increased bandwidths, especially in the optical networks. Due to the cost scaling with the number of optical channels, it is beneficial to maximize the data rate per optical channel, which requires an increase of the signal bandwidth for the single channel.

This growing bandwidth imposes higher requirements on the electronics of the transmitter and the receiver. On the transmitter side, this applies in particular to the electronic digital-to-analog converters (DAC). The growing demand for bandwidth in transmitters has been satisfied with CMOS DACs in 65 to 28 nm technology in the past years. They provide conversion rates of 56 to 92 GS/s; however, it has been become apparent in the last years that the maximum conversion rate will hardly increase beyond 130 GS/s. Moreover, the output bandwidth will barely reach values far beyond 40 GHz, even in the latest CMOS technologies (e.g. 7 nm Fin-FET).

Therefore, new circuit concepts are urgently needed to further increase the electrical bandwidth per channel. For this purpose, a pure electrical multiplex of several DAC output signals with an integrated circuit is desirable. The eligible techniques are frequency division multiplex and analog time division multiplex. Frequency division multiplex requires lumped mixers and high-Q analog filters, which are not well suited for a high level in integration. Solely, analog time division multiplex enables a single compact monolithic integrated chip, which combines several DAC output signals to a single signal. The project partners have already demonstrated an analog 2-to-1 multiplexer (AMUX) for baud rates up to 112 GBd in 2017.

In this follow-up project, analog multiplexers in various configurations and topologies, baud rates up to 200 GBd and signal bandwidths exceeding 100 GHz shall be researched and demonstrated. The project includes modelling, digital signal processing, IC-Design, IC-realization and experimental evaluation.