H.264 Enhanced Low Latency Video Codec

The Fraunhofer Heinrich Hertz Institute HHI offers a range of H.264 /AVC compliant codecs (IPs) for use in industrial applications. Specially tailored to real-time applications, the IPs allow coding of up to 1080p resolution on current FPGA technologies. The codecs are fully hardwired implementations with low power consumption and minimal resource usage.


  • H.264 /AVC baseline profile compliant
  • Intra refresh feature to avoid bitrate peaks
  • Inter prediction supports all macroblock partition sizes
  • Low latency below 2 frames
  • SD and full HD resolutions up to 1080p with 30fps supported
  • Low clock demands for real-time coding
  • Low resource demands (Numbers for Xilinx Virtex-6 FPGA LX240T)
    - Slices: 34.000
    - Slice registers: 90.000 
    - Slice LUTs: 98.000
    - Block Ram: 212
    - DSP48E1s: 65

Fraunhofer HHI offers both encoder and decoder solutions, which are available for evaluation.