Projects of Detectors Group

Current projects


Space FIT

Research on compact QKD receiver payloads for high-altitude platforms and satellites

(Funded by the state of Berlin - Co-funded by the European Union (EU))

Duration: October 2024 - September 2027

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optimizeD cohErent reCeiver fOr cv-qkD systEms

Program Indentification Code: QuNet+

(Funded by the Federal Ministry of Education and Research)

Duration: December 2022 – November 2025

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Complexity-Optimised Quantum Receiver with Free Beam Interface

(Funded by the German Federal Ministry of Education and Research)

Network Coordinator: Pixel Photonics GmbH

Duration: January 2022 - December 2024

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The EU-funded HiCONNECTs project aims to develop cloud and edge computing platforms that are sustainable, energy-efficient, and bring cloud services closer to end users.

Duration: January 2023 – December 2025

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Photo-Digital Channelizer for Flexible Digital High Throughput Satellites

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Quantum communication technologies for hybrid communication systems

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Continuous Variable Quantum Communications

Applying CV-QKD in Existing Telecom Infrastructure

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Fabrication and assembly automation of TERabit optical transceivers based on InP EML arrays and a Polymer Host platform for optical InterConnects up to 2 km and beyond

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EU Project QAMeleon to develop the next generation of photonics and electronics technology that will enable 128 Gbaud optical data flow generation, reception and switching over an SDN platform.

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Past projects


July 2011 – June 2014

HiLight – Hochlinearer Optischer Empfänger für digitale 400 Gb/s Systeme

Funded by Federal Ministry of Education and Research

In Cooperation with u2t Photonics AG, IHP GmbH

Detectors Group

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October 2010 – March 2013

HINT – Hochauflösende Infrarot-Niedertemperatur-Thermometrie auf der Basis von III/V Halbleitersensoren

Funded by Federal Ministry of Education and Research

In Cooperation with Optris GmbH, Micro-Sensors GmbH

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MIRTHE targets new multilevel-modulation all-monolithic integrated TX and RX Photonic Integrated Circuits (PICs) able to achieve 100-400 Gb/s aggregated speed on a single wavelength.

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Co-funded by: Federal Ministry of Education and Research (BMBF)

Duration: 09/2005 - 08/2008

Cooperation: Fraunhofer-HHI (InP chips), TU-Berlin (SOI board technology) und u2t Photonics AG (module technology)

Topic: Design and fabrication of flip-chip mountable balanced photodiodes and SOA-Chips, to be placed on an SOI-based D(Q)PSK network board, to achieve a 50 Gbit/s D(Q)PSK-Photoreceiver


Co-funded by: Framework 6 of European Commission Development Fund

Topic: The focus of GIBON is on the demonstration of the highest speed components that integrate the optoelectronic transducers (light modulator and photodiode) with their driving electronics (driver and preamplifier respectively). New transmitters and receivers will be developed based on designs experienced at lower bit rates (40 and 80 Gbit/s) and their characteristics will be optimised in order to match specifications that will be derived from systems considerations. In order to reach the 100 Gbit/s objective, the integration technology that will be used for the transceivers is as important as the optoelectronic devices characteristics. Guidelines for the design and realization of integrated devices as well as for the components packaging will be given by a supporting Electro-Magnetic simulation activity. This project will be completed by an assessment of the fabricated components with respect to the projected.


Co-funded by: Framework 6 of European Commission Development Fund

Topic: The objective of HECTO is development of photonic components, transmitter and receiver, for high-performance and high-speed but cost-efficient communication systems. Applications are Time Division Multiplexed (TDM) optical systems with up to 160Gbit/s as well as optical packet-switching networks based on serial 100GbE signals requiring about 110Gbit/s. Especially, receivers with bandwidths of 100GHz and above will be developed with waveguide pin photodetectors integrated with electronic amplifiers, and the required high-speed electronics for electrical clock recovery and demultiplexing to lower speeds. The components will be tested in systems experiments. To ensure that they will meet the demands of the future market, technology application assessment will accompany the technical investigation and development